SDADCCKEN=0, SDADCCKSEL=0
24-bit Sigma-Delta A/D Converter Clock Control Register
| SDADCCKSEL | 24-bit Sigma-Delta A/D Converter Clock Enable 0 (0): 24-bit Sigma-Delta A/D Converter Clock is disabled 1 (1): 24-bit Sigma-Delta A/D Converter Clock is enabled |
| Reserved | These bits are read as 000000. The write value should be 000000. |
| SDADCCKEN | 24-bit Sigma-Delta A/D Converter Clock Select 0 (0): MOSC is chosen by a source clock of 24-bit Sigma-Delta A/D Converter Clock 1 (1): HOCO is chosen by a source clock of 24-bit Sigma-Delta A/D Converter Clock |